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[情報] 2-DIE Xeon? 下一代CPU SPR-SP照片流出

看板PC_Shopping標題[情報] 2-DIE Xeon? 下一代CPU SPR-SP照片流出作者
hcwang1126
(王小胖)
時間推噓10 推:10 噓:0 →:36

寫在前面:
Intel為了對飆AMD CPU的核心數
並不是第一次使用膠水(Cascade Lake-AP)
多了一個Die自然核心數,記憶體和PCIE通道數倍增
良率可能就...
ICX最多40C已經釘死
ICX下一代SPR要抗擊米蘭甚至熱那亞
勢必要出招(沒128C, 至少意思要到)
目前看資料不像是黏大Die

重編:
TOM's或許猜對了SPR的走向->chiplets
但這裡面很多都和已知的事實不符
可以預見SPR應該不會再卡製程 了吧?

TOM's Hardware原文連結:https://reurl.cc/EzAZ7K

Two-Die Xeon? Leaked Sapphire Rapids Photo Appears to Show Chiplets

2Die Xeon? 流出的Sapphire Rapids(CPU代號)照片似乎顯示了Chiplets

A member of ServeTheHome forums has published what he claims to be the first
photos of Intel's Xeon Scalable 'Sapphire Rapids' processor. If the images
are legitimate, they may shed some light on the design of the CPU and may
indicate that it does not use a large monolithic die, but actually carries
two dies.

ServeTheHome 論壇的成員 發布了他所謂的英特爾Xeon Scalable“Sapphire Rapids”處
理器的第一張照片。如果影像是合法的,則它們可能會為CPU的設計提供一些啟示,並可能表明它
沒有使用大型的單片晶片,但實際上帶有兩個晶片。

The photos depict an LGA processor with a metallic heat spreader carrying an
'Intel Confidential' mark, which indicates that this is a pre-production chipmeant for testing and evaluation. Another engraving indicates a rather
moderate 2.0 GHz frequency of the CPU which is something to be expected from
an early sample. Also, since the processor is a pre-production sample, it hasa four-character stepping: QTQ2. Since the device does not look like an
existing Intel processor, it could well be a sample of Intel's upcoming
Sapphire Rapids.

這些照片描繪了帶有金屬散熱器(有case非裸晶)的LGA處理器,該散熱器帶有
“ Intel Confidential”標記,表明該晶片是用於測試和評估的預生產晶片。另一個刻圖表明CPU的頻率相當中等,為2.0 GHz,這是早期樣本所預期的。同樣,由於處理器是生產前樣品,因此它具有四個字符的步進:QTQ2。由於該設備看起來不像現有的英特爾處理器,因此很可能是英特爾即將推出的SPR的樣本。

The front side of the alleged Sapphire Rapids processor reveals a rather
intriguing detail. The heat spreader of the CPU has two bulges of about the
same size. Intel's contemporary CPU heat spreaders do feature a number of
convexities, but there is always one main 'bump' above the main die. Two
bulges may indicate that Intel uses two processor dies for Sapphire Rapids
instead of one monolithic die.

所謂的SPR處理器的正面顯示了一個相當有趣的細節。CPU的case有兩個大小相
同的凸起。英特爾現代的CPU case確實具有許多凸點,但在主芯片上方始終有一個主“
凸點”。兩個凸起可能表明英特爾為藍寶石急流使用了兩個處理器晶片,而不是一個整體晶片。

The back side of the CPU looks typical for Intel's latest server processors
with its land grid array split into two domains. Meanwhile, there are two
identical sets of capacitors in the middle of the package, which supports thetheory that Intel's Sapphire Rapids is indeed a multi-chip-module (MCM)
carrying two dies interconnected using one of Intel's latest technologies
(e.g., EMIB). By contrast, Intel's monolithic dies have one set of capacitorson the back of their packaging.

對於英特爾最新的伺服器處理器,CPU的背面看起來很典型,其land grid array分為兩塊(如果你看過一般Intel server CPU的背面, 就會比較理解這在講什麼)
。同時,封裝中間有兩組相同的電容器,這支持以下理論:英特爾的Sapphire Rapids實際上是一個多晶片模塊(MCM),帶有兩個晶片,這些晶片使用英特爾的最新技術(例如EMIB)互連。 。相比之下,英特爾的單晶片在其封裝的背面只有一組電容器。

Using an MCM — or chiplet — design has a number of advantages when it comes
to development and manufacturing. For obvious reasons, it is easier to
design, emulate, and debug smaller chips. It is also easier to hit decent
clocks and yield levels with smaller dies. On the other hand, large
monolithic dies work more efficiently as internal interconnections are alwaysfaster than off-chip interconnects.

在開發和製造中,使用MCM(或小晶片)設計具有許多優勢。出於顯而易見的原因,設計,模擬和測試較小的晶片更加容易。較小的裸片更容易達到良好的clock和良率。另一方面,大型單片晶片的工作效率更高,因為內部互連總是比片外互連更快。

As a rule, Intel does not comment on leaked information about its unreleased
products, so do not expect the company to confirm or deny any facts about itsSapphire Rapids processor beyond what is has already been revealed.

通常,英特爾不會對未發布產品的洩漏信息發表評論,因此不要指望該公司證實或否認有關Sapphire Rapids處理器的任何事實。

So far, Intel has publicly confirmed that its Sapphire Rapids processors willuse the Golden Cove microarchitecture that supports Intel’s Advanced Matrix
Extensions (AMX) as well as AVX512_BF16 and AVX512_VP2INTERSECT instructions
that are particularly well suited for datacenter and supercomputer workloads.

到目前為止,英特爾已經公開確認其SPR處理器將使用支持英特爾高級矩陣擴展(
AMX)以及特別適合數據中心和超級計算機工作負載的AVX512_BF16和
AVX512_VP2INTERSECT指令的Golden Cove微架構。

In addition to microarchitectural innovations, the new CPU will feature a
DDR5 memory controller (enhanced with Intel’s Data Streaming Accelerator,
DSA), the PCIe 5.0 bus with a 32 GT/s data transfer rate that is enriched
with the CXL 1.1 protocol to optimize CPU-to-device (for accelerators) as
well as CPU-to-memory (for memory expansion and storage devices)
interconnects. Intel will produce Sapphire Rapids using its 10 nm Enhanced
SuperFin technology.

除了微結構創新外,新CPU還將配備DDR5內存控制器(加強的英特爾數據流加速器DSA)
,PCIe 5.0總線,數據傳輸速率為32 GT / s,並通過CXL 1.1協議進行了最佳化,以最佳化CPU。到設備(用於加速器)以及CPU到記憶體(用於記憶體擴展和存儲設備)的互連。英特爾將使用其10nm增強型SuperFin技術生產SPR。

心得:
工程師有上廁所需求帶新iphone導致照片外流
可以理解
CPU也照片露出...

以前:chiplets延遲過高
未來:真香
(情報文刷p幣也是...)

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qwe753951 12/14 10:02用EMIB的話算有進步啦

Aksky 12/14 10:07這看起來是lga4189 應該是CooperLake-AP

friedpig 12/14 10:11這種MCM也不是這顆才開始之前56C的就這樣搞了

friedpig 12/14 10:149282那顆不知道最後到底有沒有賣出去 看起來很鬧

AreLies 12/14 10:159282是整機賣

nkc731210 12/14 10:20膠水cpu又來了,雲端企業會買單? 我想不太可能,因

nkc731210 12/14 10:20為這是workaround solution

friedpig 12/14 10:20Server幾乎都是整機買拉 不過之前那顆應該單純硬要

friedpig 12/14 10:21打平單Socket 純死撐不要死太難看而已

hcwang1126 12/14 10:24對耶 都忘了那個停掉的CPX黑歷史

kuma660224 12/14 10:252die其實就無腦暗示是大Die了

Nexus5X 12/14 10:26良率沒啥差吧 i皇有虛到封裝都有問題嗎

kuma660224 12/14 10:26小Die黏2顆的話 還是規模很小 不適合

Nexus5X 12/14 10:26喔喔我看兩次才知道你說啥0.0

kuma660224 12/14 10:27跑2ghz根本不會是小顆8核chiplet

kuma660224 12/14 10:2887%可篤定仍是幾十核的大Die

kuma660224 12/14 10:28但多黏2顆以上變成巨Die

kuma660224 12/14 10:29畢竟是Server用的,核心不能少

tactics2100 12/14 10:31On board不就要幾核就幾核嗎?

friedpig 12/14 10:46原來他停掉了喔 看起來就是純拿出來跑分喊不輸的手

friedpig 12/14 10:46工藝品

nnkj 12/14 11:00然後爆熱

kuma660224 12/14 11:55chiplet堆起來 本身不會降低功耗

kuma660224 12/14 11:55是用chiplet提高先進製程良率後

kuma660224 12/14 11:55用先進製程降低了功耗

kuma660224 12/14 11:56所以製程還是關鍵

kuma660224 12/14 11:57chiplet只是讓黑科技製程早點實用的手段

kuninaka 12/14 12:08chiplet的問題就是延遲

kuninaka 12/14 12:08所以要有各種神奇澆水

hcwang1126 12/14 13:29剛看到消息熱那亞要黏到96c!? 甘有可能?

sdbb 12/14 13:34樓下bubunana,我在家裸奔

friedpig 12/14 13:37反正天花板就XCC*2 XCC有48核就有96C阿

kuninaka 12/14 14:105nm嗎 不無可能

aegis43210 12/14 14:32MCM方面,i皇P4就在做了,OK的

hcwang1126 12/14 14:58Pentium-D?

FXW11314 12/14 20:09拼核心數拼不贏的話不知道乾脆黏四顆有沒有搞頭

bobboy8755 12/14 21:48全部黏起來會不會把冷水機變熱水器啊?怕爆

kuma660224 12/14 23:01黏4顆的問題是功耗與成本

kuma660224 12/14 23:02intel的膠水Die還是超大顆的

kuma660224 12/14 23:03每顆Die成本都很高

kingofsdtw 12/14 23:04不錯啊,電競儲熱式熱水器

leung374025012/15 05:15如果spr xcc是單die,就算樂觀點把spr密度拉到跟m

leung374025012/15 05:15ilan一樣的density,die size也至少是tu102-ga102

leung374025012/15 05:15級別牙膏以往單die最多也就6xx mm^級別,1000mm^2

leung374025012/15 05:15的x86就算是鼎盛時期的牙膏也造不出來。

leung374025012/15 06:08只不過這顆是lga4189,spr是lga4677

※ 編輯: hcwang1126 (60.250.179.98 臺灣), 12/17/2020 11:22:11